1. Field of the Invention
The present invention relates to the field of current amplifiers having an output stage comprised of MOS transistors. The present invention more specifically applies to the implementation of an amplifier whose output stage includes two MOS transistors mounted in series between two supply lines, usually called a "rail to rail" amplifier. An example of application of the present invention relates to a so-called television set "field circuit" amplifier, the function of which is to control the vertical deviation of the electronic beam of the cathode-ray tube by supplying a deflector coil with a sawtooth-shaped current.
2. Discussion of the Related Art
In such an application, the amplifier has to issue a significant alternating current, for example, of approximately 1 amperes to 3 amperes peak-to-peak.
A push-pull amplifier in bipolar technology receiving, via a transconductance stage and a Miller frequency compensation stage, a sawtooth-shaped signal which needs to be amplified to supply the coil generally is used.
A disadvantage of a push-pull amplifier in bipolar technology is linked with the so-called "second breakdown" phenomenon of bipolar transistors. This phenomenon occurs when a bipolar transistor operates in an area of its current-voltage characteristic which is close to its breakdown voltage. This so-called "second breakdown" area depends, in particular, on the operating time of the amplifier in this area and on the ability of the circuit to dissipate power. Now, for reasons of miniaturization, bipolar transistors have the smallest possible dimensions. They then operate in an area of their current-voltage characteristic which is close to the second breakdown area. In a power amplifier for vertically scanning a television screen, the operating time induces the transistor to reach its second breakdown area. Second breakdown problems thus cannot be neglected.
The progress made in the miniaturization of MOS power transistors has spurred development of power amplifiers in MOS technology which avoid the problem of second breakdown and which give the amplifier greater robustness. For this purpose, amplifiers derived from the structure of low power CMOS amplifiers have been provided.
FIG. 1 schematically shows a conventional example of implementation of an amplifier in CMOS technology.
Such an amplifier includes two, respectively P-channel and N-channel, output transistors M1 and M2 which define the upper and lower half-output stages, respectively. The common drains of transistors M1 and M2 which are mounted in series between two supply lines, respectively V+ and V- (for example the ground), define an output terminal S of the amplifier.
A P-channel transistor M3 is mounted in a current mirror with transistor M1. An N-channel transistor M4 connects the drain of transistor M3 to the gate of transistor M2. The gate of transistor M2 constitutes a control terminal E of the amplifier which receives a positive control voltage Ve, for example, a sawtooth-shaped signal.
When voltage Ve is equal to a nominal voltage Vgs0 corresponding to a zero output voltage and imposed by a feedback (not shown) of the amplifier, a source 1 of current I conditions a current of simultaneous conduction of transistors M1 and M2, or quiescent current of the output stage. In the application to the field circuit of a television set, this quiescent state corresponds to the non-deviated position of the beam. This quiescent current is necessary to avoid a distortion at the linking-up of the positive and negative ranges, respectively, of the output current, that is, to respect the linearity of the output current.
Current I is sent onto the drain of an N-channel transistor M5, mounted in a current mirror with transistor M4. The source of transistor M5 is connected, via an N-channel transistor M6, to line V-.
The quiescent current is set so that, when voltage Ve is equal to Vgs0, the currents through transistors M1 and M2 are equal, with no current flowing through the load (not shown) connected to terminal S. When voltage Ve increases, the current through transistor M3, and thus through transistor M1, decreases and the current through transistor M2 increases. A current thus is drawn from the load. When voltage Ve decreases, the current through transistor M1 increases and the current through transistor M2 decreases. A current thus is delivered to the load.
If such an assembly overcomes the disadvantage of second breakdown in a bipolar assembly, it has several disadvantages for high power applications.
Indeed, as the amplifier supplies current, that is, as transistor M3 is conducting, the current desired to be copied in transistor M1 has to be absorbed at point E. In a power amplifier where the desired output current is, for example, 3 amperes peak-to-peak, and assuming that the ratio of the mirror comprised of transistors M1 and M3 is 100, the current to be absorbed then is approximately 15 mA.
Further, for a power amplifier and in order to respect the linearity of the output current, signal Ve should be made asymmetrical with respect to potential Vgs0.
Moreover, such an amplifier has an input impedance (terminal E) which varies very strongly with voltage Ve and which is, further, asymmetrical according to whether transistor M2 is or not conducting. Indeed, as soon as transistor M2 conducts (as soon as voltage Ve reaches the value of threshold voltage Vgs0 of transistor M2), transistor M4 blocks. The input impedance then is very high since it substantially corresponds to the gate capacity of transistor M2. Conversely, when transistor M1 conducts and transistor M2 is blocked, the input impedance of the amplifier is low and substantially corresponds to the drain-source resistance in the conducting state of transistor M4.
The article "Low Voltage BICMOS and Vertical OTA" by J. Ramirez-Angulo, IEEE PROCEEDINGS G. ELECTRONIC CIRCUITS & SYSTEMS, vol. 139, N.degree. 4 PART G, Aug. 1, 1992, pages 553-556, describes a BICMOS technology amplifier intended for low power applications. This amplifier uses two half output stages comprised of MOS transistors which are controlled by a MOS and bipolar transistor stage. Two control voltages are applied on the respective bases of two bipolar transistors and on the respective gates of two MOS transistors of the control stage. Such a circuit is limited to low excursions of the output current and does not operate correctly at high power (output current of about 1 A) unless power MOS transistors of large size are used at the output, because of the low transconductance of the MOS transistors of the control stage. Moreover, this amplifier needs a reference voltage corresponding to a voltage half way between the power supply voltages. As a consequence, it does not accept a variation of one of the supply voltages.